CONSORTIUM


About institution:

The Swiss Federal Institute of Technology Lausanne (EPFL) is one of the two federally-funded technical universities in Switzerland concentrating on research and teaching in basic and engineering sciences. The Embedded Systems Laboratory (ESL) will be the main research unit working in this project. ESL, consists of 20 members, and focuses its research on thermal and reliability exploration frameworks and management approaches for manycores and high-performance computing systems, both at micro-architectural and system level. In the aforementioned research areas related to MANGO, the ESL personnel has a long and deep experience in low-power and high-performance multi-core cimputing system design and multi-objective optimization methodologies for them, and has been interacting with companies such as Sun Microsystems, IBM, Oracle, and ST on these topics. ESL has been one of the EPFL representative in the FP7-Network on Excellence HIPEAC-2, and is partner in the recent or ongoing FP7 projects “PRO3D”, “GreenDataNet” and ”PHIDIAS” (leading partner) related to the research areas of MANGO. It is also participating in the Swiss confederation'ss Nano-Tera RTD projects “YINS” (as leading partner) and “CMOSAIC".

www.epfl.ch

Key member:

Prof. David Atienza is an Associate Professor of Electrical and Computer Engineering at EPFL, and Director of ESL at EPFL, Switzerland. He received his M.Sc. and Ph.D. degrees in Computer Science and Engineering from UCM and IMEC, in 2001 and 2005, respectively. His research interests focus on system-level energy- and thermal- aware design methodologies for multi-core computing systems and high-performance embedded systems, including new modelling and control frameworks to develop dynamic thermal management techniques for Multi-Processor System-on-Chip (MPSoCs), servers and datacenters. He has co-authored more than 200 publications in prestigious journals and conferences, and has received several best paper awards at top conferences in these fields. He has received the IEEE Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award (ONFA) in 2012 and he has been Distinguished Lecturer of IEEE CASS in 2014 and 2015. He is or has been associate editor of IEEE T-Comp., IEEE T-CAD, Elsevier Integration and DAES. He is an IEEE Fellow of IEEE and Senior Member of ACM. Prof. David Atienza has participated as PI or co-PI in 12 European projects (22 multi-partner projects overall), including 3 directly related to the objectives of MANGO, assisting in the development of new methodologies for system-level optimization of MPSoC architectures, and server and datacenter cooling optimization.


About institution:

PRO DESIGN is a privately held company which was founded in 1982. The company is located in Germany and has around 85 employees. It combines development and production of high-tech electronics under one roof. PRO DESIGN has more than 30 years of experience as provider in the E²MS market and has built extensive knowledge in the areas of electrical engineering, PCB design, production, assembly, measuring and testing. PRO DESIGN's specialists work closely together with their partners within the high-tech industries in important branches (e.g. medical, semiconductor, telecommunication, safety engineering, aerospace, etc.) world-wide and take advantage of interdisciplinary synergies. The results are powerful, cost-efficient high-end solutions characterized by sophisticated concepts, short process cycles and high reliability. Those attributes are required to meet the high requirements of the MANGO project. Our focus on innovation, combined with highest quality requirements und functionality is the basis for long-term customer relationships and first class products. We are very fast and flexible especially in situations where time is short and results are needed urgently. PRO DESIGN’s products and services include the proFPGA family of ASIC Prototyping, SoC design and FPGA systems, too. The proFPGA system is a complete, scalable and modular multi FPGA solution, which meets highest standards. proFPGA addresses applications where a reconfigurable and flexible high performance FPGA solution is required. The modular concept allows us to adapt proFPGA to the MANGO requirements in the initial stages and later on offers great basics for the dedicated chassis to be developed and used in MANGO.

www.prodesign-europe.com

Key member:

Heiko Mauersberger studied electrical engineering at the Technical University of Chemnitz and holds an MSEE. He joined PRO DESIGN in 2000 as Chief Technology Officer (CTO). During this time until 2008 he was responsible for R&D and the development of the CHIPit product line – an FPGA based chip verification and prototyping system. This product line was sold 2008 to Synopsys, the marked leader for EDA tools. With this transition Mr. Mauersberger joined Synopsys and was Director R&D within the Hardware Assisted Verification Group of the Synplicity Business Unit. When he left Synopsys in 2011 he was responsible for the development of the Confirma software and hardware platforms. Today Mr. Mauersberger is again CTO of PRO DESIGN and responsible for all R&D projects within PRO DESIGN.


About institution:

Politecnico di Milano (Milan, Italy) is the largest Technical University in Italy with more than 40000 students. The project will involve personnel of the Dipartimento di Elettronica, Informazione e Bioingegneria (DEIB) that, with about 840 members, is one of the largest European ICT departments, both for its size and for the quality of its research. According to the QS World University Rankings 2014, POLIMI is the first university in Italy in research subjects including Computer Science & Information Systems, and the seventh in Europe. POLIMI is a vital institution capable of promoting education, fundamental and applied research, and technology transfer to companies. Funding for the POLIMI research work has been attracted from a number of research projects with the Italian National Research Council, the Italian Ministry for Research and Education, national and international industry and the European Union. Research activities have been funded by EU-funded project 44%, National funded research 16%, foreign public institutions 4%, private companies 36%. Since 2009 the number of filed patents per year has been from 26 to 45. Research is the main focus of DEIB, pursued according to the highest international quality standards. DEIB has a broad network of partnerships with the best international institutions, which makes the Department one of the fundamental players in the worldwide scenario of scientific and technological innovation. Considering only DEIB, several labs are available focusing on specific topics of the research, in particular in 2013 the labs were the following: 11 Bioengineering Labs; 12 Computer Science and Engineering and Systems and Control Labs; 7 Electrical Engineering Labs; 6 Electronics Labs, and 10 Telecommunications Labs, split over 8 main facilities spread in the Lombardy region around Milano. DEIB’s eco-system also includes the CEFRIEL technology transfer center and eleven spin-offs located in the incubator and many others surviving on the marked, created by professors and former students, with still a strong relation with POLIMI. More in detail, POLIMI will participate in this project through a cross-disciplinary research team with competencies covering system architectures, embedded system design and design methodologies, and compiler construction. The System Architecture research group is composed of 3 full professors, 6 associate professors and a number of assistant professors, post-doc researchers and PhD students. This team has long been active in the field of designing computing systems and developing methodologies and prototype tools to support the automation of different phases of design. In particular, system-level design space exploration and runtime management techniques for manycore architectures have been mainstream lines of research in the recent years. POLIMI is a member of the CINECA consortium, one of the largest HPC centers in Europe. The POLIMI group has a long experience on design space exploration and optimization for system-on-chip architectures from the performance and power perspective, as well as runtime resource management, design and implementation of compilers for parallel programming languages such as OpenMP and OpenCL, code optimization for parallel architectures, including SoC multicores, NUMA multiprocessors, general purpose GPU, and VLIW processors, and scheduling techniques for OpenMP. Additionally, POLIMI will bring its long experience in participating to many European project belonging to embedded and high-performance computing areas. POLIMI has also a consolidated experience in management of projects Recently POLIMI has coordinated from the second period the FP7-OMP-85526 OpenMediaPlatform project, the FP7-216693-MULTICUBE project (Multi-objective design space exploration of multi-processor SoC architectures for embedded multimedia applications) and the FP7-248716-2PARMA project (PARallel PAradigms and Runtime MAnagement techniques for Many-core Architectures). Moreover, POLIMI participated also to SEED-22133, PEOPLE-26796, POET-2000-30125, FP7-247999-COMPLEX and ARTEMIS SMECY acting also as WPLeader. Prof. William Fornaciari from POLIMI is Project Coordinator of the on-going FP7-612069-HARPA project (2013 – 2016). POLIMI is currently participating to FP7-611146-CONTREX project (2013 - 2016).

www.deib.polimi.it

Key members:

Prof. William Fornaciari, Ph.D. is Associate Professor at POLIMI. He published six books and over 170 papers, collecting 5 best paper awards, one certification of appreciation from IEEE and holds 3 international patents on low power design. Since 1993 he is member of program committees and chair of international conferences in the field of computer architectures, EDA and system-level design. Since 1997 he has been involved in 12 EU-funded international projects and he has been part of the pool of experts of the Call For Tender No. 964-2005 – WING – Watching IST INnovation and knowledge, studying the impact of FP5 and FP6 expenditures. Recently, he participated to the projects MULTICUBE for design space exploration and the IP WASP on Wireless Sensor Networks. In FP7 he has been WP leader for the IP COMPLEX projects and Project Technical Manager of 2PARMA (ranked as success story the the EU) and he also participates to the Artemis SMECY project on smart multi-core embedded systems. Currently he is WP leader of the CONTREX IP project on mixed criticalities and Project Coordinator the the HARPA strep project on embedded and HPC technologies to ensure dependable performance. He cooperated for around 20 years with the CEFRIEL Technology Transfer Center of POLIMI, gaining significant experience in cooperating with international companies for the development of leading edge products: industrial exploitation of research ideas is one of his main attitudes. His main research interests cover multi-many core architectures, NoC, low power design, software power estimation, run time resource management, wireless sensor networks, thermal management, and EDA-based design methodologies. He is co-author of the first italian book on embedded systems and he acted as project reviewer for EC funded projects and invited speaker during EU consultation/information workshops.


Prof. Giovanni Agosta, Ph.D., has obtained the Laurea (M.Sc.) degree in Computer Engineering (2000) and the doctoral degree in Information Technology (2004) at Politecnico di Milano, where he currently holds the position of Assistant Professor (with tenure). His research interests focus on the interaction between compiler and hardware architecture and the impact of compiler transformations on non-functional characteristics of the application, including compiler techniques for security, dynamic compilation, power-aware compilation, parallel programming models (in particular OpenCL and OpenMP), as well as on design methodologies for embedded systems and logic synthesis. He has published over 50 papers in international journals and conferences, collecting two best paper awards and three HiPEAC paper awards. He has been WP Leader for the compiler tool-chain work-package in the FP7 2PARMA project, as well as WP Leader for the hardware and software acceleration techniques work-package in the ARTEMIS SMECY project, coordinating over 20 partners from 9 different European countries. In the past, he participated to the FP7 OpenMediaPlatform and FP6 ICODES projects. He is a member of the HiPEAC network of excellence, has been an expert reviewer in the CHIST-ERA program, and is the organizer of two workshops co-located with the HiPEAC conference, as well as a guest editor for a special issue of ACM TECS.


About institution:

The University of Zagreb, Croatia (1669) is the oldest and biggest university in South-Eastern Europe. Ever since its foundation, the University has been continually growing and developing and now consists of 29 faculties and three art academies. With its comprehensive programmes and over 50,000 full-time undergraduate and postgraduate students the University is the strongest research and teaching institution in the region. Faculty of Electrical Engineering and Computing at University of Zagreb is the leading Croatian academic and R&D institution in the field of electrical engineering and ICT. The Faculty is constituted of 12 departments. The present research and educational staff comprises more than 140 professors and 230 teaching and research assistants and around 3.000 students at the bachelor level, 1.300 students at the master level and 470 PhD students. The Faculty has developed respectable international cooperation with many institutions around the world and has been involved in numerous FP7 projects in the past. The members involved in MANGO project have deep expertise in video transcoding and its implementations, medical imaging applications and knowledge dissemination among different EU projects. The members involved in MANGO project are members of European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC).

www.fer.unizg.hr

Key member:

Prof. Mario Kovač is full professor at the Faculty of Electrical Engineering and Computing, University of Zagreb, Croatia. He is also an executive, author and expert in the field of multimedia hardware and software design, business models for computer systems and technology transfer. In 1990 and 1991 he received a VLSI and Computer Architecture Scholarship at the University of South Florida, and he subsequently received the Fulbright Award in 1993. He holds several US patents including U.S. Patent 5,659,362 for a VLSI circuit structure for implementing the JPEG image compression standard, among others. In 2008, Croatian President awarded him with the Medal of Honor "Order of Danica Hrvatska with the image of Ruđer Bošković" for special merit in science. Professor Kovač served as Head of the Dept. of Control and Computer Engineering and Vice Dean for Business Development at the Faculty of Electrical and Computer Engineering. He is/was a member of the supervisory boards of Croatian agencies/companies CARNet, HIT - Croatian Institute of Technology and BICRO and is managing several international projects. He is senior member of the IEEE Computer Society, the Croatian Academy of Engineering and several other Societies. Currently he is mostly involved in business relations with industry partners in the area of computer systems and applications and business models in various industry segments such as health, banking and telecom. He was executive in several research and innovation investment organizations.


About institution:

The Centro Regionale Information Communication Technology scrl (CeRICT) is a consortium of ten universities and public research centres in the Campania Region, Italy, set up as an outcome of the CRdC ICT project in 2002 by the Campania Region. The CeRICT main mission is to increase the economical and social value of affiliated research institutions matching the medium/long-term research needs of Industry and Public Administrations. CeRICT also provides a lightweight administrative infrastructure simplifying the management of complex research projects, including European projects. More than 200 professors, researchers, and technicians form the virtual staff of CeRICT through its affiliated organizations. Particularly relevant to the MANGO proposal are the competences of the University of Naples Federico II and the Second University of Naples, both part of CeRICT. The University of Naples Federico II, particularly the Department of Electrical Engineering and Computer Science (DIETI), hosts 6 faculty members and 9 research fellows and PhD students working on digital hardware design as well as electronic system-level and design automation methodologies. Specific activities include advanced digital design techniques, particularly targeting reconfigurable technologies, the use of high-level programming languages and frameworks for automated hardware generation, and dedicated hardware acceleration for cryptographic processing. The university premises also host a digital hardware system development laboratory that will be used in MANGO for on-chip architecture exploration. The Second University of Naples, particularly the Department of Industrial and Information Engineering (DIII), hosts the information engineering group including 9 faculty members and around 5 PhD students, highly active in the area of grid and cloud computing, high performance computing and systems, performance evaluation and simulation. The members of the University of Naples Federico II and the Second University of Naples have recognized participation and contributions in top ranked conference in the area of electronic design automation, computer architecture, and parallel computing. They are involved in a number of European projects, targeted activities in the area of HPC, like HPC-Europa2, as well as steering committees like the executive boards of the IEEE CS Technical Committee on Scalable Computing (IEEE-TCSC, https://www.ieeetcsc.org/organization), the IEEE Working group on Cloud Interoperability, and the European Commission’s Cloud Computing Expert Group - Internet of Services, Software and Virtualization Unit.

www.cerict.it

Key member:

Alessandro Cilardo is currently an assistant professor at the University of Naples Federico II. He received a five-year degree in Electronics Engineering, magna cum laude, in 2003, and a PhD degree in Computer Science in November 2006. He is the single or main author of around 60 peer-reviewed papers published in leading scientific journals and conferences, including various IEEE transactions, ACM transactions, as well as top conferences like DATE and FPL. His research focuses on digital design methodologies and the application of programming paradigms and tools from the parallel computing domain to electronic system-level design. A further research activity in the area of computer arithmetic targets the application domain of security and cryptography-related processing. Alessandro Cilardo is involved in a number of funded projects at both the national level (PRIN projects) and the European level (7FP projects). Among other activities relevant to the MANGO proposal, he was the organizer of the DATE 2014 Special Interest Workshop on Electronic System-Level Design towards Heterogeneous Computing, he worked on heterogeneous acceleration of HPC security-related applications in the framework of the HPC-Europa2 project, he is the Principal Investigator of the HtComp-Heterogeneous Computing In The Cloud: Enabling Tomorrow’s High-Performance Applications project, co-funded by Compagnia San Paolo foundation (STAR call) and selected for funding by the European Science Foundation in 2013. He is a member of the Institute of Electrical and Electronics Engineers (IEEE) and the European Network of Excellence on High Performance and Embedded Architecture and Compilation (HiPEAC).


Main researcher:

About institution:

EATON is a global technology leader in diversified power management solutions that make electrical, hydraulic and mechanical power operate more efficiently, effectively, safely and sustainably. EATON’s Power Quality Division, located near Grenoble, France, designs and manufactures UPS systems that meet the highest protection requirements of mission critical environments such as data centres. Without compromising performance and reliability, EATON puts a lot of emphasis on improving the energy efficiency of IT environments through:
  • Highly efficient UPS products
  • Innovative power distribution architectures
  • Virtualisation technologies
  • Rack and airflow management solutions
EATON offers a complete solution to store, cool, power, manage and secure mission-critical equipment.

http://www.eaton.com

Key member:

Dr Fabrice Roudet is Data Center Program Manager for EATON’s Single Phase Power Quality Division, in charge of developing a new offer for the management of data center infrastructure. He is the project coordinator of F7 project GreenDataNet (www.GreenDataNet-project.eu). Fabrice Roudet graduated from Grenoble Institute of Technology, got his PhD on wireless communication in harsh environment, and held several technical and management positions with Schneider Electric before joining EATON. He participated in many European or national collaborative projects as leader or contributor. Fabrice authored several technical articles, co-authored several patents, and is a senior member of IEEE. He also contributed to AFNOR and ISO standardisation bodies.


About institution:

Universitat Politecnica de Valencia is a public university with four campus sites, over 35,000 students and 2,600 faculty members and research staff. It consists of 44 Departments, most of them in engineering areas, and is the top University in Spain regarding patent production. Contributions to this project will come from the Parallel Architectures Group (GAP). GAP has a 24-year research expertise in different aspects of system architecture, especially on interconnection networks. Currently, the group is formed by twenty-nine researchers, eighteen of them being faculty members, and the remaining 11 members being students developing their PhD theses in the group. GAP will focus on design of interconnect-centric architectures both at the tile level and at the multicore level for the MANGO chip. It will provide partitioning and reconfigurability functionality. Some of the members of the GAP group have lead research projects focused on FPGA and on-chip interconnects, providing also virtualization and partitioning support in embedded multicore systems. The members involved in MANGO have developed a multicore architecture (from the basic processors, to the networks and memory hierarchy) developed in Verilog and ready for being used in the FPGA-based prototyping solution. Members of the team have recognized participation and contributions in top ranked conference for Computer Architecture field and Parallel and Distributed Systems, being TPC member of ISCA, HPCA, SuperComputing conference, as well as Associate Editor of IEEE journals like CAL and TPDS. The GAP group is member of the ETP4HPC platform which defines the roadmap and European strategy for next generation HPC systems in Europe.

www.upv.es

Key member:

Jose Flich got his PhD in 2001 in Computer Engineering is an Associate Professor at UPV where he leads the research activities related to NoCs. He has served in different conference program committees (ISCA, NOCS, ICPP, IPDPS, HiPC, CAC, ICPADS, ISCC), as program chair (INA-OCMC, CAC) and track co-chair (EUROPAR, SC). José Flich has collaborated with different Institutions (Ferrara, Catania, Jonkoping, USC) and companies (AMD, Intel, Sun). Current research activities focus reconfiguration, routing, coherency protocols and congestion management within NoCs. He has co-invented different routing strategies, reconfiguration and congestion control mechanisms, some of them with high recognition (RECN and LBDR for on-chip networks). He is a member of the Hipeac-2 NoE. He has co-edited a book for the field of networks-on-chip. He was the Coordinator of the FP7 STREP NaNoC project and currently participates in the vIrtical FP7 project.


About institution:

Thales Communications & Security S.A.S. is a major subsidiary of the Thales Group. Thales employs 67,000 persons; its revenues totaled 13 billion euros in 2011, half from the commercial businesses and half from the professional and defense domains. Thales is the European technology leader providing safety and security, 40% in transport and aerospace, 60% in Security and Defense. Thales is a world market leader in integrated transport systems, providing rail signaling, communication, supervision and fare collection requiring a lot of smart sensors. Thales is the first-tier supplier to Airbus, Boeing, Dassault, Eurocopter and other major commercial aircraft. In the European Defense sector, Thales provides the electronic and IT products and systems to support the different military and peace keeping platforms. In terms of security and information technologies, over half of the world's banks and busiest stock exchanges use Thales technologies to ensure the security of their transactions. Thales is also manufacturing detector technologies for health and holds a leading position in some products. One third of Thales staff is dedicated to innovation. Thales Communication & Security is responsible for the development of the main activities of the Information and Secured Communications’ Systems (SIX) and of several activities of the Ground Transport Systems (GTS) GBU. Thales Communications & Security provides :
  • To public or private infrastructure operators and transport (outline, subway, bus, tram routes): signalling solutions for railways and subways, integrated communications and monitoring systems as well as systems ticketing (outline, metros, buses, tramways, roads).
  • To civil administrations and the private sector: C4I systems for urban safety and the protection of critical infrastructure, security solutions for information systems security and identity systems and CBRN systems,
  • To armed forces (land, air, sea), the joint structures and special forces: civil protection services C4ISR modular, secure and interoperable solutions, which meet the requirements of joint commitments and network operations,
Designer, prime contractor, large system integrator and high value added service provider, Thales Communications & Security is the information systems and telecommunications systems global designer. Thales Communications & Security is involved in the following fields:
  • Digital imagery and geography
  • Detection, observation and identification systems
  • Command and Control Information systems
  • Equipments and systems to secure information systems
  • Airborne communications, identification and navigation systems
  • Naval communication systems
  • Mobile, Tactical and Satcom communication systems
  • Network and infrastructure systems

www.thalesgroup.com

Key member:

Dominique Ragot holds an Engineer Diploma from Ecole Nationale Supérieure des Télécommunications, Paris (now Telecom ParisTech). He is working at Thales since 1991 and is now expert software architect in embedded and real-time Systems at the R&D direction. His domains of expertise are real-time communications, embedded software for multiprocessors and multicores, mobile networks, complex systems modeling. He has been regularly involved in cooperation projects both national and European since 2002. He co-authored several patents and papers.


About institution:

Royal Philips Electronics is a main electronics company focusing on healthcare and well-being. In healthcare, Philips’ innovation revolves around improving the quality and efficiency of healthcare through a focus on care cycles. Central to care cycle thinking is a patient-centric approach that optimizes healthcare delivery for all the major diseases. In the Philips Healthcare (PH) sector, over 12% of systems sales are invested in R&D. Philips combines its expertise in medical technology with clinical know-how of its customers to produce innovative solutions that meet not just the needs of individual patients, but which also enable healthcare professionals to work faster, more easily and more cost-effectively. While PH has a large global organization, in the Netherlands more than 3000 people work at PH, of which 1000 in R&D. At PH in Best the Business Innovation Unit DHP-Clinical is involved in MANGO. DHP stands for Digital Health Platform. DHP was created in September 2014 to combine earlier platform developments within Philips. DHP-Clinical meet the demands of our customers who are asking for solutions that provide them with a cockpit of integrated clinical applications and information they can access any time, any place. Right now, DHP-Clinical is accelerating development of our workstations and platforms, and influencing developments involving over 4300 people. Teams work together to deliver a leading workspace portal solution and provide a best-in-class integrated consoles and application platform for Philips Healthcare. Philips is involved in many EU funded projects for several decades, both as participant and as leader. Already in the 1980’s Philips was involved in a large EU funded project on parallelism, ESPRIT 415. The results of this project is still in use today. More recently, Philips was and is involved in several projects on parallel implementations of medical image processing equipment, with a focus on parallel image processing, real-time rendering and programmability of off-the-shelf multi-core hardware. The programmability problem is not yet solved, however, Philips is able to move more image processing to multi-core processing, up to 8 cores. As image processing is resource consuming using more cores with a real-time response is relevant, therefore MANGO is crucial to get experience with multi-cores.

http://www.philips.com

Key member:

Clemy van Gogh is senior Architect Integrated Clinical Applications and Platform, Philips Healthcare. Clemy has long engineering history in large mission critical software systems. He started as designer/programmer in high precision production devices and defense industry. Clemy has now 20 years’ experience in healthcare domain. Started initially as programmer/designer, later on as team and subproject leader and performed architect roles. Clemy has technical focus and operated about 15 years as software project, platform and solution architect. Clemy has broad experience in Philips Healthcare product development, ranging from acquisition devices, to enterprise image management systems, interoperability aspects and medical imaging platforms. Experienced in multiple architecture aspects, patterns and development methodologies; covering component based development, service oriented architecture, highly scalable solutions and agile. Clemy is graduated as MSc in software engineering.